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ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions 8.0 V ? V PWR = V SUP ? 40 V ?? -40 ? C ? T A ? 135 ? C, unless otherwise noted. Typical
values noted reflect the approximate parameter means at T A = 25 °C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
OVER-CURRENT COMPARATOR
Common Mode Input Range (22)
Input Offset Voltage
Over-current Comparator Threshold Hysteresis (21)
V CM
V OS_OC
V OC_HYST
2.0
-50
50
–
–
V DD -0.02
50
300
V
mV
mV
Output Voltage
V
High Level at I OH = -500 μA
Low Level at I OL = 500 μA
V OH
V OL
0.85 V DD
–
–
–
V DD
0.5
HOLD OFF CIRCUIT
Hold Off Current (At Each GATE Pin)
I HOLD
10
–
300
μA
3.0 V < V SUP < 40 V, V GATE = 1.0 V (23)
PHASE COMPARATOR
High Level Input Voltage Threshold
Low Level Input Voltage Threshold
High Level Output Voltage at I OH = -500 μA
Low Level Output Voltage at I OL = 500 μA
High Side Source Input Resistance (21) , (26)
V IH_TH
V IL_TH
V OH
V OL
R IN
0.5 V SUP
0.3 V SUP
0.85 V DD
–
–
–
–
–
–
40
0.65 V SUP
0.45 V SUP
V DD
0.5
–
V
V
V
V
k ?
DESATURATION DETECTOR
Desaturation Detector Threshold (24)
V DES_TH
1.2
1.4
1.6
V
CURRENT SENSE AMPLIFIER
Recommended External Series Resistor (See Figure 9 )
R S
–
1.0
–
k ?
Recommended External Feedback Resistor (See Figure 9 ) (27)
R FB
k ?
Limited by the Output Voltage Dynamic Range
Maximum Input Differential Voltage (See Figure 9 )
V ID = V AMP_P - V AMP_N
V ID
5.0
-800
–
–
15
+800
mV
Input Common Mode Range (21) , (25)
V C M
-0.5
–
3.0
V
Input Offset Voltage
V OS
mV
R S = 1.0 k ? , V CM = 0.0 V
-15
–
+15
Input Offset Voltage Drift (21)
? V OS / ? T
–
-10
–
μV/°C
Input Bias Current
I b
nA
V CM = 2.0 V
-200
–
+200
Notes
21. This parameter is a design characteristic, not production tested.
22. As long as one input is in the common mode range there is no phase inversion on the output.
23. The hold off circuit is designed to operate over the full operating range of V SUP . The specification indicates the conditions used in
production test. Hold off is activated at V POR or V THVLS.
24.
25.
26.
27.
Desaturation is measured as the voltage drop below V SUP , thus the threshold is compared to the drain-source voltage of the external
High Side FET. See Figure 5 .
As long as one input is within V CM the output is guaranteed to have the correct phase. Exceeding the common mode rails on one input
will not cause a phase inversion on the output.
Input resistance is impedance from the high side source and is referenced to V SS . Approximate tolerance is ? 20 ??
The current sense amplifier is unity gain stable with a phase margin of approximately 45°. See Figure 10 .
33937A
Analog Integrated Circuit Device Data
10
Freescale Semiconductor
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